发明名称 MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR WAFER
摘要 <p>PROBLEM TO BE SOLVED: To reduce the inspection time of a semiconductor wafer on which many semiconductor chips are disposed. SOLUTION: Self diagnosis circuits 25 are provided individually in a plurality of semiconductor chips 12 disposed on a semiconductor wafer, power lines 23, 24 for feeding powers to the chips 12, signal lines 21 for taking out the result of the quality of the chips 12, and clock feed lines 22 are disposed on scribe lines 13 of the semiconductor wafer. The plurality of semiconductor chips 12 are inspected at once by the self diagnosis circuits 25, power lines 23, 24, signal lines 21 and clock feed lines 22, and the result is taken out by probing. The individual semiconductor chips 12, to which the powers and clock are given are discriminated generally as to the quality by their respective self diagnosis circuits 25, and the result can be taken out through the signal lines 21 and inspecting pads.</p>
申请公布号 JPH11204597(A) 申请公布日期 1999.07.30
申请号 JP19980007598 申请日期 1998.01.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ASHITANI NAOTO
分类号 G01R31/28;H01L21/301;H01L21/66;H01L21/822;H01L27/04;(IPC1-7):H01L21/66 主分类号 G01R31/28
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