发明名称 ANALOG-TO-DIGITAL CONVERTER
摘要 PURPOSE:To reduce the converting time, by executing the change of an up/down counter from the high-order bit. CONSTITUTION:m Sets of up/down counters 8-11 of n bits per one counter are used and the conversion of N bits (N=m.n) is made by splitting the conversion into m sets. m Sets of the 1st- the m-th counters 8-11 correspond respectively from the minimum bit to the maximum bit. First, a controller 6 operates only the counter 11 at the most significant bit and converges counted values coarsely to an analog input value inputted from a terminal 21. Next, the controller 6 converges with the fineness set upward by one step by operating the (m-1)th counter 10. This operation is repeated similarly and convergence is made in the accuracy of 1/2N to complete the conversion. The content of the counters 8-11 is picked up as an output. Thus, the converting time can be improved to 2<n->N m times.
申请公布号 JPS57192125(A) 申请公布日期 1982.11.26
申请号 JP19810076944 申请日期 1981.05.21
申请人 NIPPON DENKI KK 发明人 UENO TAKAHIDE
分类号 H03M1/46;H03M1/56;(IPC1-7):03K13/08 主分类号 H03M1/46
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