发明名称 Programmable logic array system incorporating Josephson devices
摘要 A Programmable Logic Array (PLA) system which utilizes Josephson devices and the noninverting capabilities of these devices is disclosed. The disclosed PLA system includes a personalized Read Only Memory (ROM) which is adapted to store the applied input signals as well as the output signals which are a logic function of the input signals. As soon as outputs from the ROM are available, an interface circuit which may be timed or untimed, inverting or noninverting provides output signals which can be utilized to drive other logic circuits or to act as inputs to another personalized Read Only Memory (ROM). The latter provides another logic function of the inputs at its outputs. Again, the outputs may be used directly or applied to another interface circuit which itself may provide inverted or noninverted outputs. Like the first mentioned ROM, the second mentioned ROM is capable of storing its inputs and the resulting outputs which are some logic function of the inputs as a result of the ROM personalization. The ROM's involved utilize memory cells which are programmable Josephson junction devices operating in a liquid helium environment. The programmable logic array system is disclosed in a full adder embodiment which is dc powered. A similar hybrid embodiment using both ac and dc power is also shown. The resulting system using high density ROM's provides high speed logic using relatively standard loop circuits which minimize the effect of the presence of resonances of known random logic circuits.
申请公布号 US4360898(A) 申请公布日期 1982.11.23
申请号 US19800164118 申请日期 1980.06.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FARIS, SADEG M.
分类号 G11C11/44;H03K19/177;H03K19/195;(IPC1-7):G11C11/44 主分类号 G11C11/44
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