| 摘要 |
PCT No. PCT/SE79/00205 Sec. 371 Date Jun. 13, 1980 Sec. 102(e) Date May 30, 1980 PCT Filed Oct. 12, 1979 PCT Pub. No. WO80/00904 PCT Pub. Date May 1, 1980.In a digital phase-locked loop, preferably for bit rate regeneration in synchronous data transmission systems, transmitting from a sender to a receiver redundantly coded information possibly modulated in a suitable mode there is an addition circuit connected to one control input of a digital controlled oscillator incorporated in the loop. The addition circuit adds control signal contributions from a phase comparator circuit of the loop and an error detector. This error detector is connected to an output of the receiver data detector, and examines whether the input signal in the circuit has the inherent redundant properties expected taking into account the signal coding. When this is not the case, a pulse-shaped control signal is fed to the addition circuit.
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