| 摘要 |
PURPOSE:To prevent electrode disconnection and to enhance integrity by a method wherein electrode thickness is maximized though limited by hole depth when an insulator layer covering a semiconductor device is provided with holes and exposed impurity diffused regions are provided with lead-out electrodes. CONSTITUTION:A thick field oxide film 11 is formed covering the periphery of a P type semiconductor substrate 10 whose central portion is provided with a gate electrode 15 after a thin gate oxide film 14. Next, the lamination (A) acts as a mask in a process of forming an N<+> type source region 12 and an N<+> type drain region 13 by diffusion on both sides of the mask. The entirety is then covered with an insulator layer 16 of a prescribed thickness which in turn is covered with a mask of a resist film 19 with openings 19a located opposite to the regions 12 and 13. A photo etching work follows wherein the layer 16 exposed in the openings 19a is removed for the provision of contact holes 16a. The regions 12 and 13 as exposed in the contact hols 16a are covered with layers 17a of an electrode forming substance, Al, AlSi, Mo, or MoSi. The layers 17a are to be as thick as possible though not to rise beyond the contact holes 16a. |
