发明名称 SPEED SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To obtain a smooth speed signal by obtaining an acceleration signal from a speed signal, obtaining a speed correction signal from the acceleration signal, and then adding and subtracting it to and from the speed signal. CONSTITUTION:An incremental position signal obtained by a position detector is supplied as a forward pulse la or a reverse pulse 1b to a speed counter 1, which counts up or down. The number of the pulses la or 1b is sampled and held in a speed register 2a to differentiate a position, and consequently the register 2 outputs a speed signal 2a. A speed register 3 samples and holds the output of the register 2. The outputs of the registers 3 and 2 are supplied to a subtracter 4. The output (acceleration signal) of the subtracter 4 is supplied to an acceleration counter 7, which outputs a speed interpolartion signal 7a for interpolating the speed signal 2a to an adding and subtracting circuit 8. The circuit 8 adds and subtracts the signal 2a to and from the signal 7a to output a speed signal 8a.
申请公布号 JPS57189068(A) 申请公布日期 1982.11.20
申请号 JP19810074424 申请日期 1981.05.18
申请人 NIPPON DENKI KK 发明人 INADA HIROSHI
分类号 G01P3/481;G01P3/44;(IPC1-7):01P3/44 主分类号 G01P3/481
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