| 摘要 |
PURPOSE:To perform control efficiently wherein individual pages admit access from an IOC but not from a CPU by setting DAT not in the CPU but in an MMC. CONSTITUTION:A CPU 22 is not contained with an address conversion machanism DAT and performs memory access by emitting the imaginary addresses formed by programs to a common bus 27, but a main storage control part MMC 21 contains a DAT 23 and performs access of a main storage module by converting the imaginary addresses given from the bus 27 to physical addresses. The control wire in the bus 27 announces whether the request for memory access is given from the CPU 22 or an input-output control unit IOC 24. The DAT 23 consists of a conversion circuit which converts the imaginary addresses to the corresponding physical addresses and an address conversion buffer for increasing the speed of memory access. |
