| 摘要 |
PURPOSE:To simplify the constitution of a branch destination address controlling circuit, by using the residual operand length in the processing of an operand as the next address of a control storage. CONSTITUTION:In a conventional circuit, a control line L1 is eliminted and control lines L2 and L3 are added instead. Lower bits of a register REG2 are transferred to a multiplexer MPX through the control line L2, and a signal indicating whether the last data length l is equal to 8 bits or shorter than 8 bits is given to the control line L3 to switch the multiplexer MPX. In case that 256-byte operand length is processed 8 bytes by 8 bytes, the last data length l is 8 bits if the first- the fourth bits are 0 and the fifth- the seventh bits are 1, and the last data length l is shorther than 8 bits if the first- the sevventh bits are 000- 110 smaller than said case. Consequently, when the multiplexer MPX selects the signal of the control line L2 if the last data length l is shorter than 8 bits, the reset operand length constitutes a part of the branch address of a control storage CS. |
