发明名称 BRANCH INSTRUCTION EXECUTION SYSTEM
摘要 PURPOSE:To shorten the time equired for the execution of a branch instruction, by setting an instruction of an objective branch destination out of plural branch destinations to an instruction register. CONSTITUTION:The instruction code of an instruction stored in upper 4 bytes of an instruction register 14 and the instruction code of an instruction stoerd in lower 4 bytes are inputted to a branch continuous discriminating circuit 18 to detect the continuity of read branch instructions. Branch condition flags (a) and (b) of continuous branch instructions A and B are inputted to a branch destination discriminating circuit 19 and are compared with condition code information to discriminate a branch destination. The output of the circuit 18 and the output of the circuit 19 are inputted to a continuous branch controlling circuit 20 to perform the control for fetching of the instruction of the branch destination. Thus, the instruction of the objective branch destination out of plural branch destinations is set to the instruction register 14.
申请公布号 JPS57187748(A) 申请公布日期 1982.11.18
申请号 JP19810071467 申请日期 1981.05.14
申请人 NIPPON DENKI KK 发明人 YAMANO KOUZOU
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
主权项
地址