| 摘要 |
PURPOSE:To obtain elevated performance by external adjustment, and to elevate yield, by providing a duty control part on an input inverter part and a dummy inverter part of a clock driver, and driving it. CONSTITUTION:Duty controlling MOSFETs M7-M12 of clock driver pulses P1, P2 are newly provided and constituted. The FETs M7, M8 add (gm) to the load MOSFET M2 of the initial stage inverter and the load M12 of the dummy inverter, respectively. Analog inverting circuits M9, M10 receive control voltage from the external terminal, supply complementary DC bias V1 to the gate of the FET M8, and vary its (gm). The control voltage VI is supplied to the gate of the FET M7 and controls its (gm). Subsequently, from a push-pull circuit consisting of FETs M3, M4 and FETs M5, M6, the pulses P1, P2 whose duty value is different are obtained respectively in accordance with high or low potential of the voltage VI. |
