发明名称 |
MULTIPLEX CHANNEL COMMON CLOCK SYSTEM |
摘要 |
A clocking system is disclosed for a multichannel data transmission system which includes a temporary storage medium, such as magnetic tape. The system is an improvement over prior art systems which utilize a separate phase locked loop clock correction circuit for each channel. The described system utilizes a single clock for the multiple channels which operates at a frequency F that is an integral multiple of the channel baud rate. Means are provided to continually monitor the phase error of each channel and a composite correction signal is derived and applied to the clock signal which is proportional to the average of the phase errors of the individual channels. |
申请公布号 |
JPS57186858(A) |
申请公布日期 |
1982.11.17 |
申请号 |
JP19820041830 |
申请日期 |
1982.03.18 |
申请人 |
INTERN BUSINESS MACHINES CORP |
发明人 |
RUISU TEIBA;DON GEIROODO IISUTO |
分类号 |
G11B20/16;G11B20/14;H04L7/00;H04L7/033 |
主分类号 |
G11B20/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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