发明名称 CODE CONVERTER
摘要 PURPOSE:To shorten a processing time by a comparatively small scale, by constituting a code converter of a data cycling device, a selective multiplier, a remainder device and a square device. CONSTITUTION:Input data sequences a0, a1, a2, ... applied to an input terminal 101 are applied to a data cycling device 103 and are outputted cyclically only for a prescribed time. A selective multiplier 104 selectively switches to one of a data from the cycling device 103 as it is, or the product of the data of the cycling device 103 and a data of a square device 106, or the data of the square device as it is, and provides it to a remainder device 105. The remainder device 105 converts the data from the multiplier 104 to the remainder divided by a positive integer (n). Also, the square device 106 converts the data from the remainder device 105 to a data squared by making (n) a root, and provides it to the multiplier 104. As a result, the remainder obtained by dividing a0<m>, a1<m>, a2<m>, ... (m is a positive integer) by (n) is outputted to an output terminal 102. In this way, this code converter is constituted like a pipeline, therefore, its processing time is shortened to log2m or so of the processing time of the multiplier.
申请公布号 JPS57186861(A) 申请公布日期 1982.11.17
申请号 JP19810071629 申请日期 1981.05.13
申请人 NIPPON DENKI KK 发明人 OKAMOTO EIJI
分类号 H03M5/04;H03M5/00;H03M7/00;H04L9/18;H04L9/30;H04L12/22 主分类号 H03M5/04
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