| 摘要 |
PURPOSE:To improve the latch-up resisting and radiation resisting property of a C-MOS by stacking an N<-> epitaxial layer with not less than 2mum thickness to a P type Si substrate with an N<+> buried layer and forming an N layer to a section just above the buried layer and a P layer to remainder sections. CONSTITUTION:The N<+> layer 2 in not less than 1X10<17>/cm<3> is shaped to a P type Si substrate 1 in 1X10<18>/cm<3>, and the N<-> epitaxial layer 3, concentration thereof is 1X10<17>/cm<3> or higher and thickness thereof is 2mum or thicker, is stacked. Ions are implanted, and thermally diffused, the N layer 5 is formed to the section just above the N<+> buried layer 2 and the P layer 4 to the remainder sections, and the concentration of the surfaces of each well is brought to approximately 1X10<16>/cm<3>. When a CMOSIC is manufactured by using the substrate, the latch-up resisting property is improved up to approximately treble and proof stress to alpha-rays up to approximately decuple. |
