| 摘要 |
<p>Disclosed is a bubble memory chip manufactured using the following processing steps: a first dielectric insulation layer is deposited on an epitaxial garnet substrate, next, a comparatively thicker layer of a second dielectric insulator is deposited on the surface of the first layer of dielectric insulation, next, the reverse of the desired conductor image is printed on the surface of the second layer of dielectric insulator using a resist material such as a photoresist, next, a straight wall etching process is used to achieve a straight wall etching of the second layer of dielectric insulation but not affecting the first layer of dielectric insulation, next, the selected conductor material is deposited into the exposed groove from the previous etching process and over any remaining resist material such as a photoresist, next, a resist material is applied over the resulting conducting surface from the previous step, next, a coarse featured pattern is printed over the desired conductor regions leaving exposed the extensive surface area of the chip where no finished conductor features will be present, next, all exposed conductor is etched off using chemical processes, and finally, the last step is a stripping of the photoresist including lift-off of remaining unused conductor material to leave a planar surface.</p> |
