| 摘要 |
PURPOSE:To increase the processing ability of the entire device, by stopping of access of a corresponding channel temporarily, when an access request is given from other control section, in accessing a register memory from a plurality of channels by means of a pipeline system. CONSTITUTION:An access request from input and output channels CH2-5 to a control information register 15 is given to a CH access selecting circuit 14 via access permission gates 10-13, and an access signal from the circuit 14 to the register 15 is outputted with a pipe line system. In this case, memory permission FFs 6-9 are set from a memory data transfer control section 1, CH permission signals 106-109 are outputted, and further a CH permission signal 110 is outputted, logical product is taken at the gates 10-13 and the result is given to the circuit 14. In accessing the register 15 from the section 1, an access signal 105 is outputted and the corresponding CH in the FFs 6-9 is reset, the accessing of the CH is inhibited for a prescribed period, the accessing of the other CHs is executed, and when the accessing of the other CHs is inhibited, the signal 110 is stopped for a prescribed one cycle. |
