| 摘要 |
PURPOSE:To facilitate the digital IC-implementation of a receiver for a signal modulated into the long-short data of the transition time of a synchronizing signal by an information, by composing the receiver of a threshold value circuit, a delay circuit, and a flip-flop. CONSTITUTION:A long-short data code is applied to the input terminal 1 of a transmitting circuit 6 and then inputted to an output circuit 3. A clock signal applied to a terminal 2 is applied to the anode of a varactor diode 5. The varactor diode 5 when biased reversely increases in junction capacity, and at the output terminal 4 of the transmitting circuit 6, a signal generated by varying the transition time of the clock signal according to the long-short data code to the input terminal 1 appears. At a reception side, the signal is inputted to an edge trigger type flip-flop 18 having a threshold level VT1 (>VT2) and also inputted to an edge trigger type flip-flop 18 through a threshold circuit 13 having a threshold value VT2 and a delay circuit 15, regenerating an original signal at a terminal 16. |
