| 摘要 |
PURPOSE:To make the execution time zero and to raise the execution speed overall, by transferring the second operand to a register indicated by the address of the first operand. CONSTITUTION:Instructions A, B, L, C and D are continuous, and the instruction L instructs the computer to transfer contents of the second operand to a register indicated by the address of the first operand. In the last cycle for the instruction A, the result of the instruction A is stored in the first operand, and a selector 16 selects an output STA of an ALU 14 to set it to a status register 17, and PC and contents ILA of an instruction length register 20 are added in a program counter 19; and in this case, contents ILB of an instruction length buffer 104 of the first level are forcibly controlled to zero and are set as PC+ILA=PCA. Thus, the next instruction B is executed similarly after the instruction A is terminated. |
