发明名称 VARIABLE GAIN CIRCUIT
摘要 PURPOSE:To obtain a variable gain circuit suitable for IC-implementation and to reduce the offset voltage of an output by constituting the variable gain circuit so that transistors (TR) as gain control elements all use NPN ones. CONSTITUTION:A signal from a signal input terminal 1 is processed by the voltage-current conversion of an impedance element R1, and the resulting signal is applied to the uninverted input terminal of an amplifier A1. The output of this amplifier A1 is applied to TR circuits Q31-Q34 connected as shown in the figure. A voltage at a connection point between the collector of the 3rd TRQ33 and the emitter of the 4th TRQ34 among said TR circuits is processed by current-voltage conversion through an amplifying circuit A2 and an R2, and the resulting signal is led out to a signal output terminal 2. Then, the ratio of bias currents of the respective TRs is varied in accordance with gain control signals S1-S4 supplied externally, thus controlling the gain.
申请公布号 JPS57181215(A) 申请公布日期 1982.11.08
申请号 JP19810065960 申请日期 1981.04.30
申请人 TOKYO SHIBAURA DENKI KK 发明人 YAMADA HISASHI
分类号 H03G3/12;H03G1/00 主分类号 H03G3/12
代理机构 代理人
主权项
地址