发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To form the three layered wiring improving the integration by a method wherein the diffusion wiring layer for connection is formed when the circular diffusion layer for protecting the inverse conductive type well is formed on the Si substrate. CONSTITUTION:The poly Si gate electrodes 4, 5 are provided on the N type substrate through the intermediary of the P type source 1 and the drain 2. These gate electrodes 4, 5 are lead to the other transistor region through the extended Si wiring layers 4a, 5a located under the lower layer of the Al wiring 7 through the intermediary of the insulating film of the substrate. The P type diffusion type wiring 22 between the P type drain 2 and the Al wiring 8 on the insulating film of the substrate is formed before the drain 2 is formed when the P type impurities are diffused in case the protective ring of the P well is formed. Through these procedures, the diffused layer 2 and the Al wiring 8 may be connected by the window 8 without fail because the diffused wiring 22 is not formed into the gate region even if said wiring 22 is overlapped with the poly Si wiring 5a. In such a constitution, the semiconductor device comprising the Si gate CMOSIC with high integration may be manufactured.
申请公布号 JPS57180172(A) 申请公布日期 1982.11.06
申请号 JP19810065477 申请日期 1981.04.30
申请人 NIPPON DENKI KK 发明人 MIYAMOTO AKIRA
分类号 H01L21/8234;H01L27/06;H01L29/78 主分类号 H01L21/8234
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