发明名称 PERIPHERY DESIGN FOR CHARGE BALANCE POWER DEVICES
摘要 <p>A charge balance semiconductor power device comprises an active area having strips of p pillars and strips of n pillars arranged in an alternating manner, the strips of p and n pillars extending along a length of the active area. A non-active perimeter region surrounds the active area, and includes at least one p ring surrounding the active area. One end of at last one of the strips of p pillars extending immediately adjacent an edge of the active area terminates at a substantially straight line at which one end of each of the remainder of the strips of p pillars also end. The straight line extends perpendicular to the length of the active area along which the strips of n and p pillars extend.</p>
申请公布号 WO2007106658(A2) 申请公布日期 2007.09.20
申请号 WO2007US62817 申请日期 2007.02.26
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION;PARK, CHANHO;YEDINAK, JOSEPH, ANDREW;KOCON, CHRISTOPHER, BOGUSLAW;HIGGS, JASON;LEE, JAEGIL 发明人 PARK, CHANHO;YEDINAK, JOSEPH, ANDREW;KOCON, CHRISTOPHER, BOGUSLAW;HIGGS, JASON;LEE, JAEGIL
分类号 H01L29/76 主分类号 H01L29/76
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