发明名称 Method and apparatus for performing post-placement functional decomposition for field programmable gate arrays
摘要 A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes synthesizing a design for the system. Components in the design are mapped onto resources on the target device. Placement locations are determined for the components on the target device. The design for the system is restructured after placement locations for the components are determined to improve timing for the system.
申请公布号 US7290239(B1) 申请公布日期 2007.10.30
申请号 US20040858300 申请日期 2004.06.01
申请人 ALTERA CORPORATION 发明人 SINGH DESHANAND;MANOHARARAJAH VALAVAN;SCHABAS KARL
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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