发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To protect the ratch up by a method wherein the SChottky barrier diode SBD with an unique constitution is arranged in the P channel FET on the CMOS unit. CONSTITUTION:The P<+> layer 121 and the N<+> layer 117 of the P and N channel MISFET provided on the N type Si substrate 101 are connected to the other by means of the Al wiring 130 between the electrodes 126 and 123 while the Al electrode 125 is provided coming into contact with the P<+> layer 120 and the N type substrate 101 and the P<+> layer 120 is connected to the input terminal at the region A to insert the SBD into the region B where the input terminal and the N type substrate 101 come into contact with each other. Likewise in the N<+> layer 118, the Al electrode 124 comes into contact with the N<+> layer 118 and the P layer 104, however, no ratch up happens because the Al 124 shortcircuits the emitter and the base of the parasitic transistor. In this constitution, no ratch up happens, because when an excessive circuit is instantaneously input into an external electrode, most of the current flows into the substrate 101 causing no positive feedback phenomenon. Consequently the upper limit voltage in the normal operation as a CMOS unit is remarkably boosted.
申请公布号 JPS57177554(A) 申请公布日期 1982.11.01
申请号 JP19810062466 申请日期 1981.04.27
申请人 HITACHI SEISAKUSHO KK 发明人 MEGURO RIYOU
分类号 H01L27/08;H01L27/092;H01L29/47;H01L29/78;H01L29/872 主分类号 H01L27/08
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