发明名称 SYNCHRONIZING SYSTEM FOR DUPLICATED SYSTEM
摘要 PURPOSE:To improve the reliability for the opreation of a duplicated system, by making a synchronizing port dual as the substitute for a common memory and the hardware for memory management. CONSTITUTION:The system consists of the 1st and 2nd central operation processors 1 and 2 and a serial data interface (SIO) comprising two each control sections A and B tying the central opeation processors 1 and 2, and control sections 3a and 4a, and 3b and 4b are respectively connected via synchronizing ports 5 and 6, and the data of the central operation processor 1 is transmitted in paralle with the processor 2 via the control sections 3a and 4a, and 3b and 4b. Next, the data are transmitted from the processor 2 to the processor 1 via the control sections 3a, 4a and 3b, 4b, for data transmission/reception.
申请公布号 JPS57176470(A) 申请公布日期 1982.10.29
申请号 JP19810062037 申请日期 1981.04.23
申请人 MATSUSHITA DENKI SANGYO KK 发明人 SATOU MITSUO
分类号 G06F11/18;G06F11/16;G06F15/16 主分类号 G06F11/18
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