| 摘要 |
<p>PURPOSE:To prevent lowering in threshold value and punch-through due to short channel effect caused by the miniaturization of a memory cell, by connecting each source side of a momory cell group to a potential generating circuit and applying a prescribed potential. CONSTITUTION:Memory cells M(1,1), M(1,2)- are arranged at each crossing position set with a plurality of column lines S1, S2, S3- set to be orthogonal to a plurality of row lines R1, R2-, and the source of this memory cell group is connected to a potential generating circuit 12 and a prescribed potential V1 is applied. Thus, 0 level applied to the gate of the memory cell is at negative potential by viewing relatively from the source side. Further, the potential is excessively applied by the potential V1's share for the back gate bias of the memory cell, allowing to prevent lowering in the threshold voltage and punch- through due to the short channel effect even with shorter channel length. Thus, the restriction of increase in the potential of column lines due to leakage current generaed from the memory cells in non-selection can be avoided.</p> |
