发明名称 E-PROM WRITE-IN CIRCUIT
摘要 <p>PURPOSE:To obtain suitable write even if the channel length of a memory element is dispersed, by detecting a channel leakage current of a memory element and controlling a drain voltage of the actual memory element with this detected output. CONSTITUTION:Taking a channel leakage current of a memory element 1 as, e.g., 5muA per one memory element, a current limit MOS transistor (TR) 6 limits the current to 5muA, and the threshold voltage Vth7 of a current limit MOS TR 7 is increased. The gate voltage of the TR 7 becomes (V1+Vth7) (where; V1 is a drain voltage of a reference memory element 8), a shift by a current amplifying MOS TR 3 is compensated and the drain voltage V3 of the element 1 becomes V3=V1. Thus, the channel leakage of the element 1 is detected and the drain voltage of actual memory elements is controlled with the magnitude of the channel leakage current. Then, even if the processing of channel length of the memory elements is dispersed, suitable write-in can be achieved.</p>
申请公布号 JPS57176595(A) 申请公布日期 1982.10.29
申请号 JP19810061208 申请日期 1981.04.24
申请人 HITACHI SEISAKUSHO KK 发明人 SUGIURA JIYUN;FUKUDA MINORU;KOMORI KAZUHIRO;YAMATANI SHIGERU
分类号 G11C17/00;G11C16/02;G11C16/06;G11C16/24 主分类号 G11C17/00
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