发明名称 INFORMATION PROCESSING SYSTEM
摘要 PURPOSE:To eliminate the need for the discrimination of types of transferred data before transfer, in case of data transfer, by providing a means designating the memory address for the data to be transferred. CONSTITUTION:The data transfer from an upper-order system U to a lower- order system D is made as follows: Data are written in the said area of a memory at a memory write/read circuit A2 from a bidirectional port S1 of the upper-order system U to a bidirectional port S2 of the lower-order system D via a gate G2. This write is made according to the DMA system or an interrup- tion processing program. Further, the completion of data transfer is informed by the write instruction release to a control register C1. A flag release instruction is transmitted from a control circuit C2 to the register C1. This procedure can also be applied to the data transfer from the lower-order system D to the upper-order system U.
申请公布号 JPS57176471(A) 申请公布日期 1982.10.29
申请号 JP19810062149 申请日期 1981.04.24
申请人 FUJITSU KK 发明人 SAITOU HAJIME
分类号 G06F13/00;G06F12/00;G06F15/16;G06F15/163;G06F15/177 主分类号 G06F13/00
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