发明名称 MEMORY DEVICE
摘要 PURPOSE:To assure a suitable address function over all address lines, without increasing capacity of a decoder, by providing an MOS transistor on the way of row or column address lines. CONSTITUTION:An NOR type address decoder 2 is connected to one end of a word line 1, which is connected with a plurality of bit lines. A signal level control means 5 is provided on the way of the word line 1. In this means 5, an MOS transistor is used, and the gate and the source are connected to the word line 1 and the drain is connected to a power supply. With this constitution, even if the word line 1 is long or a voltage drop along the word line 1 is large, the means 5 can recover the signal voltage level. Thus, the signal level more than a prescribed value along the word line 1 can be assured without increasing the capacity of the decoder 2.
申请公布号 JPS57176590(A) 申请公布日期 1982.10.29
申请号 JP19810059175 申请日期 1981.04.21
申请人 RICOH KK 发明人 UMEKI SATOSHI;MATSUOKA TSUGUHIRO
分类号 G11C11/413;G11C8/08;G11C8/14 主分类号 G11C11/413
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