发明名称 Method and apparatus for parallel packet switching
摘要 Available time slot(s) in a packet switch are identified in order to route a packet from an input port to a designated output port. The status of each time slot is logically combined with regard to the input port and with regard to the output port to generate the status of the time slot with regard to the given input port-output port pair. The status of input port-output port pairs is logically combined in pairs to determine whether one of the input port-output port pairs is available and the step of pair-wise logically combining the status of input port-output port pairs is repeated to determine input port-output port pair availability until one available input port-output port has been identified.
申请公布号 US7403524(B2) 申请公布日期 2008.07.22
申请号 US20020203556 申请日期 2002.08.12
申请人 BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY 发明人 HILL ALAN M
分类号 H04L12/28;H04L12/56 主分类号 H04L12/28
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