| 摘要 |
A data handling system has a content controlled serial to parallel interface formed by a 90 DEG rotation shift register 21 for serial input data in a fixed length data record format, each record being proceded by a resynchronization pattern. The shift register has an extra bit position and a flag bit is inserted into the shift register when a resynchronization pattern is detected. The shift register is then reset and shifted until the flag bit is shifted into the extra flag shift register bit position. Detection of the flag bit at that position is a reliable indication that a symbol or fixed pattern of data has been assembled and can be offloaded into the holding register for resynchronization with the system read clock. The system eliminates use of a separate counter to monitor the position of data during the detection process. |
