发明名称 PHASE COMPARATOR CIRCUIT
摘要 PURPOSE:To eliminate the need for initialization while speeding up operation by eliminating an astable state by using a setting priority type flip-flop. CONSTITUTION:Waveform shaping circuits 11 and 12, gate circuits 13 and 14, and flip-flops 15 and 16 use AND gates and OR gates respectively and constitute a phase comparator circuit together with inverters G17 and G18, and NAND gates 17 and 18. When an input signal Sig and a reference signal Ref are both 0s, the outputs of the flip-flops 15 and 16 are both 1s and outputs A and B are both 1s. When the input signal Sig is 0, the outputs of the flip-flops 15 and 16 are unchanged, so the output B is 1. Then when the reference signal Ref goes up to 1, the outputs of the gate circuits 13 and 14 are 0s and the flip-flops 15 and 16 are reset to generate outputs 0. In this case, the output B goes up to 1, but the output A is still 1.
申请公布号 JPS57173223(A) 申请公布日期 1982.10.25
申请号 JP19810057927 申请日期 1981.04.17
申请人 TOKYO SHIBAURA DENKI KK 发明人 MIYAGAWA JIYUN
分类号 H03L7/089;H03K5/26 主分类号 H03L7/089
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