发明名称 VOLTAGE BOOSTING CIRCUIT OF MEMORY CIRCUIT
摘要 PURPOSE:To achieve sufficient writing operation by boosting the voltage of a word line by capacitances >=2 times. CONSTITUTION:Switches SW1, SW2, and SW3 are all in on states initially, and switches SW1 and SW3 are turned off; and then a signal phiA generated by a generating circuit 40 goes up to a level Vcc, and consequently the potential of a word line W is raised to the Vcc. A signal phiB goes up to a high level (Vcc) and is passed through a capacitance CB to boost the voltage of the word line W above the Vcc. At this time, the voltage phiA at the output terminal of the phiA generating circuit is also boosted. Then, the switch SW2 is turned off and a signal phiC goes up to the high level (Vcc). The signal phiC further boosts the voltage of the word line W through a capacitance Cc.
申请公布号 JPS57172587(A) 申请公布日期 1982.10.23
申请号 JP19810057142 申请日期 1981.04.17
申请人 HITACHI SEISAKUSHO KK 发明人 ETOU JIYUN;KAWAJIRI YOSHIKI;HORI RIYOUICHI;ITOU KIYOO
分类号 G11C11/407;G11C11/408;G11C11/4096 主分类号 G11C11/407
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