发明名称 LARGE SCALE INTEGRATED CIRCUIT TESTING DEVICE
摘要 PURPOSE:To execute a test efficiently, by constituting so that contents of a test data memory for storing a result of the test, and a direct result of the test can be switched and displayed, and also the result obtained in the course of executing the test can be observed even after the test has been executed. CONSTITUTION:In case of the execution time display mode, an address signal is divided into a group X and a group Y, the divided signals are converted to analog signals by D/A converters 14, 15, and are applied to X and Y input terminals of a CRT indicator 16. On the other hand, a result of a test decided by comparing an output signal of a device to be tested, with an expected value signal by a comparator is applied to a Z input terminal, and the luminance is displayed. In case when it is used in the display mode after execution, a test data memory 12 becomes a read-out operation mode, the address signal applied to said device to be tested is used once again, the test data memory is scanned, and the written result is displayed on the indicator 16. In this way, detailed analysis of the cause of failure regarding the device to be tested can be executed at a high speed and efficiently.
申请公布号 JPS57172263(A) 申请公布日期 1982.10.23
申请号 JP19810050507 申请日期 1981.04.06
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 NARUMI NAOAKI
分类号 G01R31/28;G01R31/317;G11C29/00;G11C29/44 主分类号 G01R31/28
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