发明名称 MICROPROGRAM CONTROLLING SYSTEM
摘要 PURPOSE:To easily achieve microprogramming with unconditional discrimination with less number of steps, by including a microinstruction ineffective designation bit to a microinstruction and making the operation of the microinstruction ineffective with this designation. CONSTITUTION:A micro mu instruction read from a control storage 1 is set to a mu instruction register 2 with a clock signal 100. The mu instruction word has the 1-1-1-n field FD designating the operation of data processing sections 3-1- 3-n, a branch address FD of the mu instruction address designation executed next, a conditional designation FD, and an ineffective FD consisting of ineffective bits 1-n making operation designation of the 1-1-1-n FD ineffective. The result of processing from the processing section 3-1-3-n is inputted to a selector 4 and one of designation from the condition designation signal 202 from the conditional designation FD is outputted from the selector 4. In this case, if the ineffective bit is 1, a clock inhibiting signal is outputted from NAND circuits 5-1- 5-n, the signal 100 is suppressed and the operation of the processing sections 3-1-3-n is inhibited.
申请公布号 JPS57172448(A) 申请公布日期 1982.10.23
申请号 JP19810058080 申请日期 1981.04.16
申请人 NIPPON DENKI KK 发明人 ISHIKAWA TOSHIO
分类号 G06F9/22;G06F9/26;G06F9/28 主分类号 G06F9/22
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