发明名称 DUTY CYCLE CONTROLLER
摘要 PURPOSE:To eliminate an idle stop control of duty, by performing an operation, by satisfying at least both conditions for the lapse of the prescribed duty cycle time and for the existence of the operation command signal of a control subject. CONSTITUTION:The output signal of a thermoswitch 2 is applied to the producing conditions for the start signal SR of both a duty cycle timer DCT and a duty stop timer DST. For this purpose, the output of an NOT circuit N1 plus a temperature state signal C1 given from the switch 2 are supplied to a diferentiating circuit 11 via an AND gate A3. As a result, both timers DCT and DST are started only when the following two conditions are satisfied at one time. One of these two conditions is the disapperance of the duty cycle signal DCS, i.e. the lapse of the set time from the preceding starting point; and the other conditions is that the internal temperature has reached the set upper limit value.
申请公布号 JPS57169808(A) 申请公布日期 1982.10.19
申请号 JP19810054410 申请日期 1981.04.13
申请人 HITACHI SEISAKUSHO KK;HITACHI REINETSU JIYUUSETSU KK 发明人 ISHIHATA KAZUFUMI;OKAJIMA IKUO;SUZUKI MASAAKI;MIYASAKA TAKAAKI
分类号 F25D11/00;F24F11/02;G05B19/02 主分类号 F25D11/00
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