发明名称 LOGIC SYSTEM
摘要 PURPOSE:To decrease the number of additional auxiliary latched down to a half, by setting an auxiliary latch with every 2nd system latch and connecting the auxiliary latch to every 2nd system latch to form the channels of two types of shift registers. CONSTITUTION:The inputs and outputs are connected to each other among system latches L1-L8 to form a shift register channel. In addition to this 1st shift register channel, the 2nd shift register channel of L1-T1-L3-T2-L5-T3-L7 is formed with auxiliary latches T1, T2 and T3. When a gate signal G1 is actuated, the 1st shift register channel of L1-L2-L3-L4-L5-L6-L7-L8 is actuated. Then a gate G2 is actuated, and as a result the 2nd shift register channel can be actuated.
申请公布号 JPS57169846(A) 申请公布日期 1982.10.19
申请号 JP19810055001 申请日期 1981.04.14
申请人 TOKYO SHIBAURA DENKI KK 发明人 NITSUTA SUSUMU
分类号 G06F7/00;G06F11/22 主分类号 G06F7/00
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