| 摘要 |
PURPOSE:To reduce the size of a comparison circuit for an instruction execution execution stopping, by coinciding the address of a designated location through the use of information of the presence of a designated location as the address comparison object stored on a page table. CONSTITUTION:A TLB (Translation Lookaside Buffer) is accessed with an upper-order bit address of a logical address register 2, and a high level flag F of the designated location presence information as an address comparison object stored in a conversion real address RA and a page table is read and an FF6 is set. On the other hand, an in-page displacement DiSP set to a register 5 via the register 2 and the address from a comparison address register 9 are compared at a comparison circuit 8. A control output from an AND gate 10 is generated according to the high level output of the FF6 and a pair of high level outputs of the circuit 8. A stop controlling comparison circuit for imagined system execution instruction can be reduced with the constitution of only the in-page displacement components for the location address register and the address comparison circuit. |
