| 摘要 |
PURPOSE:To eliminate an error checking means to be provided to each processor, by feeding the error information to the processor that performs the transmission of data when a transmission error is detected on a bus after setting a bus monitor mechanism. CONSTITUTION:Various types of processors 12-1-12-N are connected to an address bus 13, a data bus 14 and an answer bus 15 which are provided commonly to a storage device 10. These processors carry out the transmission of data to a memory 10 by using the buses 13, 14 and 15 for the data write and read requests, the data write request and the data read answer, and the data write and read answers respectively. A bus monitor mechanism 11 is connected to each bus to monitor the error of transmission. In case an error is detected by the mechanism 11, the error information is fed to the processor that is performing the transmission of data, via an error informing signal line 16. Thus each processor receives only the result of the error checking to eliminate an individual installation of an error checking circuit. As a result, the hard quantity can be reduced. |
