| 摘要 |
PURPOSE:To suppress the channel leakage current of the subject semiconductor device to the minimum by a method wherein an additional region is provided on the surface of a substrate in such a manner that a circuit element will be entirely surrounded,and the potential of the additional region is controlled so that the threshold voltage of a parasitic MIS type FET becomes higher than the maximum working voltage. CONSTITUTION:An N-type additional region 2' of the reverse conductive type to a P-type substrate is provided. At this point, it is considered that a parasitic FET400 and a parasitic FET500 are connected in series between a circumferential element and its reverse side. When the N-type additional region 2' is damped to OV, as a substrate bias effect is obtained at the parasitic FET400 and the above is increased to VTF (threshold voltage of parasitic MISFET)=30V, no leakage current caused by the surface channel runs at this part. Accordingly, in the parasitic FET's 400 and 500 which were connected in series, the leakage current can be blocked by the parasitic FET400. |
