发明名称 MEMORY CIRCUIT
摘要 <p>PURPOSE:To expand the spaces of memory addresses by using the combination of a specific instruction and an optional instruction to decode the specific instruction and control the switching of a memory bank. CONSTITUTION:Combination data of a specific instruction and an optional instruction in an ROM4 are fetched into a latch 8, an output from the latch 8 and bits D0 and D1 are applied to a timing circuit 9 and, at the detection of the specific instruction, an RAM6 is switched to an RAM7. The entitled circuit is provided with also a counter 11 and a memory 12 and the switching between the RAMs 6 and 7 is stored in the memory 12. The counted value of the counter 11 is advanced by 1 at the time of a call instruction and is subtracted by 1 from the counted value at the time of a return instruction; the output from the counter 11 is discriminated as the address in the memory 12. Thus, the switching command of a switching circuit 10 is written in the memory 12 or the contents of the memory 12 are read out. In case of the return instruction, the contents read out from the memory 12 are sent to a timing circuit 9 and a correct switching command is outputted from the circuit 10.</p>
申请公布号 JPS57166656(A) 申请公布日期 1982.10.14
申请号 JP19810050329 申请日期 1981.04.03
申请人 SONY KK 发明人 TAKESHIMA YASUO;MATSUMOTO YOSHIHIKO
分类号 G06F9/32;G06F9/40;G06F12/06;G06F15/78 主分类号 G06F9/32
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