发明名称 An emitter-coupled logic circuit device.
摘要 <p>The circuit device comprises first and second voltage supply lines (L1, L2) connected to ground and an external voltage source (VEE) respectively, a voltage regulator (6) connected between the first (L1) and the second (L2) voltage supply lines and having an output terminal connected to a third voltage supply line (L3) to provide the third voltage supply line (L3) with a potential between that of the first (L1) and that of the second (L2) voltage supply line, an output buffer circuit (3) connected between the first (L1) and the third (L3) voltage supply lines, and an inner logic gate circuit (2) connected between the third (L3) and the second (L2) voltage supply lines, so that the current flowing through the output buffer circuit (3) also flows through the inner logic gate circuit (2). </p>
申请公布号 EP0062485(A1) 申请公布日期 1982.10.13
申请号 EP19820301677 申请日期 1982.03.30
申请人 FUJITSU LIMITED 发明人 HIROFUMI, TAKEDA
分类号 H03K19/00;H03K19/086;(IPC1-7):03K19/086 主分类号 H03K19/00
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