发明名称 TESTING METHOD OF IC MEMORY
摘要 PURPOSE:To quickly select an IC memory which is weak against alpha rays under non-destructive condition, by inserting an inhibiting cycle between the write cycle and the readout cycle, and setting supply voltage of the IC memory in the cycle to a low level. CONSTITUTION:The supply voltage is set to, for example, +V0, the power source is turned on, and the write cycle is started. In this write cycle, the test pattern is written in an IC memory. When the writing is completed, the supply voltage is dropped to +V2, and the inhibting cycle is started. As to the voltage value V0, it is usually selected to considerably lower value than +V0-10%. Afterward, the supply voltage is raised to +V0, information stored in the IC memory is read ot by starting the readout cycle, and the normality is judged by comparing the readout information with the written test pattern. Then, similar test sequence is executed on the inverse test pattern.
申请公布号 JPS57164499(A) 申请公布日期 1982.10.09
申请号 JP19810049324 申请日期 1981.04.03
申请人 HITACHI SEISAKUSHO KK 发明人 UCHIYAMA TAKEO
分类号 G11C29/00;G01R31/28;G11C29/50;G11C29/56 主分类号 G11C29/00
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