发明名称 DESIGNING METHOD FOR VOLTAGE COMPARING CIRCUIT
摘要 PURPOSE:To obtain operation conditions which are not affected by a load capacity or the like and accelerate the convergence of simulation, by satisfying relations, which are determined by prescribed expressions, among respective parameters such as the load capacitor in a voltage comparing circuit. CONSTITUTION:An FF consists of a transistors TRs 3 and 4, which are cross- connected and are loaded with storage batteries 1 and 2, and a circuit 5 which lowers the source potential of this FF. In a voltage comparing circuit where the source potential of this FF is decreased gradually from a potential approximating the potential, where storage batteries 1 and 2 are charged, to output a logical state corresponding to the magnitude in the initial state, parameters of a load capacity CL, a gate/source capacity Cgs of MOS TRs 3 and 4, a gate/ drain capacity Cgd, a gate/channel capacity Cch, an initial potential difference DELTAV0, an effective channel length L of TRs, a width W of them, a gate oxide film capacity C0X per unit area, a carrier movement degree mu, a variance allowable value DELTAVT of the threshold voltage, and a voltage drop speed u1 are set to satisfy relations determined by expressions.
申请公布号 JPS57164617(A) 申请公布日期 1982.10.09
申请号 JP19810049761 申请日期 1981.04.02
申请人 NIPPON DENKI KK 发明人 YUGAWA AKIRA
分类号 G01R19/165;H03K3/356;H03K5/08 主分类号 G01R19/165
代理机构 代理人
主权项
地址