| 摘要 |
PURPOSE:To control transmission/reception of a simulation data, by comparing the address of a processor connected to a common bus with a processor address designating the transmission/reception with the processor. CONSTITUTION:An address of a processor connected to a common bus 1 is stored in a processor execution table 6. A part of a simulation data 7 is stored in a processor address 8 designating the transmission/reception, the address of a processor existing table 6 and that of the processor address 8 are compared at a comparison circuit 9, if the transmission of the simulation 7 to the existing processor connected to the common bus 1 or the reception of data from the processor is made, is discriminated, and the data is outputted to the common bus 1 via a transmission gate 10 and a transmission buffer in case of transmission, and if the reception data inputted via a reception buffer 5 is equal to the simulation data 7 in case of reception is checked at a coincidence circuit 12, and the result is given to a reception status 13 via a gate 11. |
