| 摘要 |
PURPOSE:To achieve stability against external disturbance and to prevent sampling mistake, by taking the synchronism of a data sampling pulse in the packet unit of character multiplex broadcast. CONSTITUTION:When a clock run-in signal is risen between the leading of an output of the 3rd output terminal 523 of a delay device 52 and that of the 4th output terminal 524, an output of an AND circuit 573 out of a D type flip-flop circuit group 56(561-N) goes to low level and the output of a circuit 564 goes to high level. Thus, the output of an AND circuit 573 is logical 1 and the output of a counter 583 counts by +1. Thus, at each clock run-in signal one period, logical 1 is obtained from an AND circuit located at the leading. The clock pulse train corresponding to a counter having the most count value is selected at a data sampling pulse. |
