发明名称 FRAME SYNCHRONIZER
摘要 PURPOSE:To decrease the remolding of the hardware and to enable to receive a signal of various frame forms, by setting a constant for frame synchronism programmably at memory readout and picking up data through the detection of synchronizing word. CONSTITUTION:An input frame signal inputted serially is separated at each 64- bit without interruption and overlapping through shift registers 20A and 20B and stored in each address in 64-bit length of a memory 30. The information is read from a line 302 and compared with the synchronizing word pattern preset and transmitted from a set circuit 50 at a synchronizing word detection circuit 40 to pick up the synchronizing word at the head of each frame. When the synchronism is confirmed, the data in the frame is separated at a frame format control circuit 60 and outputted to a required port 70.
申请公布号 JPS57162852(A) 申请公布日期 1982.10.06
申请号 JP19810048595 申请日期 1981.03.31
申请人 FUJITSU KK 发明人 OOTA EIKICHI
分类号 H04L7/08 主分类号 H04L7/08
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