发明名称 |
PICTURE SIGNAL PROCESSING SYSTEM |
摘要 |
PURPOSE:To cope with the reading of a wide range of sizes of picture elements with only a single read piecture element size for a facsimile device or a scanner with which the size of the picture element can be varied, by synthesizing plural standard read picture elements, then giving the arithmetic averaging to these picture elements. CONSTITUTION:A picture input signal D1 receives an A/D conversion 32 of 8 bits and then an 8-bit latching 33. An 11-bit adder 35 adds this latched signal D4 with the signal D10 supplied via a gate 34. The signals added in the main scanning direction by an amount equivalent to 4 picture elements are first added to a 14-bit adder 37 to be written into a picture temporary recording memory 44. This signal written into the memory 44 is added with the signal at the same position on the next line through the adder 37 and then latched to an 8-bit latch 39 after averaged by a 4-circuit and 8-bit selector to be used as an output signal D. These circuits are all controlled by the pulses C6-C15 given from a timing pulse generator 40. |
申请公布号 |
JPS57162571(A) |
申请公布日期 |
1982.10.06 |
申请号 |
JP19810047839 |
申请日期 |
1981.03.30 |
申请人 |
MATSUSHITA DENKI SANGYO KK;MATSUSHITA DENSOU KIKI KK |
发明人 |
OOTSUKA HIROTAKA;UCHIDA HIDEO;UNO YOSHIHIRO;NAKAZATO KATSUO;SANNOMIYA KUNIO;KAWAKAMI HIDEHIKO;TSUCHIYA HIROYOSHI |
分类号 |
H04N1/393;G06T3/40;H04N1/387;H04N1/40 |
主分类号 |
H04N1/393 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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