| 摘要 |
PURPOSE:To prevent malfunction due to racing by providing a singal delay means to a positive feedback loop which constitutes an FF circuit. CONSTITUTION:An FF circuit consists of an inverter circuit IN1 which receives a write signal in synchronizing with clock pulses phi, an inverter circuit IN2 which receives the output signal of the circuit IN1, an inverter circuit IN3 which receives the output signal of the circuit IN2 synchronizing with the inverted signal phi' of the pulses phi and then supplies its output signal to the input terminal of the circuit IN2, and a delay circuit D inserted between the circuits IN2 and IN3. In this FF circuit, when the wirting of the signal in performed synchronizing with the pulses phi and holding operation synchronizing with the pulses phi' are changed over to each other, the undefined logical level transition time T1 of the circuits IN1 and IN3 is made shorter than the signal transmission delay time T2' of a positive feedback loop by the circuit. Therefore, malfunction due to racing is prevented. |
