| 摘要 |
PURPOSE:To reduce the cost of a device by decreasing the number of parts by performing resetting operation by a 0 in a synchronizing pattern which has the 0 only at the starting bit, and counting operation by a 0. CONSTITUTION:A binary counter 21 is provided instead of a shift register. A serial input signal 1 is shifted at the timing of a shift pulse 2 by a D type flip-flop 20 and every time when the serial input signal 1 is a 0, the binary counter 21 is reset. When the signal 1 is a 1, the binary counter 21 counts by an L-to-H change of the shift pulse 2 and with the serial input signal 1 of the 1, the counter continues to count by 18; when the output of the D type flip-flop 20 is a 1 at this time, the serial input signal 1 is supplied to a bit pattern matching circuit composed of an NOR gate 42 and an AND gate 23 to find coincidence, and an AND gate 23 outputs a synchronizng pattern detection signal 15. Since a data word has a 0 at its ending bit, it is not detected. |
