发明名称 INITIAL SET CONTROL SYSTEM FOR SYSTEM
摘要 PURPOSE:To prevent the generation of system down due to a fixed failure in an initial program loading, by disconnecting a failed part of the system before the initial program loading of an operating system. CONSTITUTION:If a parity error exists in tag information read out from a tag section 9-0, a parity error FF15-0 is set, and a deletion FF21-0 is set with a CHECK timing. When the FF21-0 is set, a replacement circuit 8 excludes its way from the objective of replacement. Data in a data section 10-0 are set to a fatch data register 16 and if this data includes a parity error, the FF21-0 is set. If the failure is detected in the process of system effecting processing, the failure is regarded as a fixed failuren and an operation state register 20-i corresponding to the deletion FF-i which is set, is set from a service processor. Then, a way (i) is not usable even if the CPU is set.
申请公布号 JPS57159317(A) 申请公布日期 1982.10.01
申请号 JP19810044844 申请日期 1981.03.27
申请人 FUJITSU KK 发明人 CHIBA TAKASHI
分类号 H02J1/00;G06F1/24;G06F9/445;G06F11/20;G06F13/00 主分类号 H02J1/00
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