发明名称 SIGNAL PIN ASSIGNING SYSTEM FOR INTERFACE IN DATA PROCESSOR
摘要 PURPOSE:To use all the same selection signal receiving circuits of a plurality of unit to be controlled, by changing the pin assignment of an interface wiring or a cable of an interface. CONSTITUTION:When a control unit 100 selects a unit 201 to be controlled, the unit 100 gives a signal to a connector pin 1. Then, since the unit 201 receives the signal from a connector pin (n), the signal given to the pin 1 of the unit 100 is given to a signal line 30n through a selection signal line 301 and the pin (n) of an upper-order section 2011 of the unit 201, and consequently the unit 201 is selected. When the unit 100 selects a unit 202 to be controlled, the unit 100 gives a signal to a connector pin 2. Then, the signal given to the pin 2 is given to a signal line 30n between a high-order section 2021 of the unit 202 and a low-order section 2022, thereby the unit 202 is selected. This is similarly executed for control units to be controlled at the 3rd and succeeding number.
申请公布号 JPS57159320(A) 申请公布日期 1982.10.01
申请号 JP19810045835 申请日期 1981.03.27
申请人 NIPPON DENKI KK 发明人 HISANAGA SHIYUUJI
分类号 G06F3/00;G06F12/06 主分类号 G06F3/00
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